ADC Peripheral

Last modified by Microchip on 2024/01/19 15:37

dsPIC® DSC ADC Peripheral

Analog to Digital Converter (ADC) is one of many peripherals found in the dsPIC® Digital Signal Controllers (DSC). The dsPIC33FJ32GS series all have integrated high-speed successive approximation Analog-to-Digital converters supporting power conversion applications, such as AC/DC and DC/DC power converters, as well as HID & LED lighting, and solar inverters applications. The figure below shows the dsPIC 33F ADC peripherals which include up to two Successive Approximation Registers (SAR). For devices that have two SARs, two shared Sample and Hold (S&H) circuits are available, where devices have one SAR, one shared S&H circuit is available. Each analog input also has a dedicated result buffer.

ADC dsPIC33 chart

The figure below shows the high-speed 10-bit ADC with two SAR converters and two shared S&H.

2SAR 2SH

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dsPIC DSC ADC Sampling and Conversion

Power conversion applications often require voltage and current measurements for each control loop. Therefore, the analog inputs of the high-speed 10-bit ADC module are grouped into pairs. A pair is a combination of even and odd numbered analog inputs, such as AN0 and AN1, AN2 and AN3, and so on. The ADC always converts a single pair of analog inputs at a time. Whether the conversion happens in a parallel or sequential manner depends on the number of SAR converters available on the device. For this reason, the dsPIC DSC ADC was designed to support the demanding needs of power converter applications. The most important requested features are:

  • Sampling speed: Since the input signal can change rapidly; it is mandatory to have an S&H amplifier that is capable of acquiring the input value as fast as possible. The minimum sampling required time is 72 ns.
  • Conversion speed: Each ADC is specified for a maximum conversion speed of 2 Msps. For devices that have two ADCs, the total conversion rate is 2 Msps + 2 Msps = 4 Msps.

The dsPIC DSC ADC is also capable of starting the sampling operation at the defined and precise instants in time within the PWM period and it can be triggered by up to 30 different sources.

The images below show the ADC (with two converters) sample and conversion in action. From the slideshow, we can see that the even inputs (AN0, AN2, AN4, …) are connected to the ADC1, meanwhile the odd inputs (AN1, AN3, AN5, …) are connected to ADC2.

ADC Sample Convert Operation 1

ADC Sample Convert Operation 1

ADC Sample Convert Operation 2

ADC Sample Convert Operation 2

ADC Sample Convert Operation 3

ADC Sample Convert Operation 3

 
ADC Sample Convert Operation 4

ADC Sample Convert Operation 4

ADC Sample Convert Operation 5

ADC Sample Convert Operation 5

ADC Sample Convert Operation 6

ADC Sample Convert Operation 6

 
ADC Sample Convert Operation 7

ADC Sample Convert Operation 7

 

The operation of the converter is such that it always samples and converts the signals on two input pins. The rationale for this is that in power conversion applications, the system needs to measure current and voltage regularly. This sample and convert mechanism allows the ADC to sample the two inputs at the same time.

As the sample and conversion actions take place, note that the first pair (AN0 and AN1) results are stored in two dedicated ADC registers (buffers). Then the second pair (AN2 and AN3) input pins are sampled and converted with the results stored into the subsequent two ADC buffer registers. This process continues until all ADC input pairs are sampled and converted.

Note that in the ADC 1 channel, each of the first 4 input channels (AN0 to AN6) are directly connected to a dedicated internal S&H amplifier. The last two inputs (AN8 and AN10) share the same S&H amplifier. In ADC 2, only one S&H amplifier is available and all input pins (from AN1 to AN11) are connected to it.

Note: The available analog inputs and SAR converters may vary depending on the device variant. Refer to the specific device data sheet for details.

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