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Settling Time and Overshoot

Last modified by Microchip on 2023/11/09 08:59

Settling time (t_S) is the time it takes for an op-amp to settle to achieve the specified accuracy at the output (i.e., 10 percent, 1 percent, 0.1 percent, etc.). It is strongly dependent on the circuit components in the signal and feedback paths (resistors, capacitors, inductors) and the Printed Circuit Board (PCB) layout.

Overshoot is the amount the output voltage exceeds its target value in percentage. The percentage overshoot is the maximum value minus the step value divided by the step value. The picture below shows the step response of V_OUT with regard to overshoot and settling time.

Settling Overshoot Diagram

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Settling Time and Overshoot

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