Examples of Using the Peripheral Trigger Generator
Last modified by Microchip on 2023/11/09 09:00
Contents
Alternate Dead-time ADC Sampling
Figure XI-1 shows the waveform for an application that, after being triggered by a PWM period, acquires 25 consecutive Analog-to-Digital Converter (ADC) samples of a signal modified by the PWM pulse. This sampling process is repeated over a number of PWM periods. To help ensure the validity of the data, the application does not begin the sampling at the same time interval after each PWM cycle. The start time of the sampling alternates between five and six microseconds on each PWM cycle.
Solution
- Each cycle of the programmed PTG sequence initiates a trigger generated by the PWM peripheral. (A PTG IRQ will also be initiated upon the PWM trigger to inform the application of the status of the sequence.)
- After receiving the PWM trigger, the PTG waits for a number of cycles determined by PTGTOLIM before beginning the 25 ADC conversions. PTGT0LIM is initialized to provide a five-microsecond delay on the first pass of the PTG sequence.
- A trigger signal is sent to the ADC initiating a conversion. After sending out the ADC trigger, the PTG pauses to allow the conversion to be completed. The length of the pause is determined by the value of PTGT1LIM.
- Step 3 is repeated 24 times.
- After 25 conversions, PTGT0LIM is adjusted to provide a six-microsecond pause after the next PWM trigger. Program control is transferred to Step 1, allowing the next PWM trigger to generate 25 samples after a six-microsecond pause.
- After the second set of 25 conversions has been completed, the delay time is reset to the original five-microsecond delay. Control is then transferred back to Step 1 to begin repeating the sequence.
Flow Chart
Example Code
Initializing PTG Registers
// include the XC header file to define all register and bit names
#include <xc.h>
PTGT0LIM = 0x0046 // 5 μs x 14 clocks/μs
PTGT1LIM = 0x000B // 1 μs x 14 clocks/μs] - three Step clocks
PTGC0LIM = 0x0018 // (total of 25 inner loop iterations
PTGC1LIM = 0x0001 // total of two outer loop iterations
PTGHOLD = 0x0046 // 5 μs x 14 clocks/μs
PTGADJ = 0x000E // 1 μs x 14 clocks/μs
PTGSDLIM = 0x0000 // no Step delay
PTGBTE = 0x0000 // no broadcast triggers
PTGQPTR = 0x0000 // start of Step queue
PTGCST = 0x8200 // after PTGQPTR is initialized
#include <xc.h>
PTGT0LIM = 0x0046 // 5 μs x 14 clocks/μs
PTGT1LIM = 0x000B // 1 μs x 14 clocks/μs] - three Step clocks
PTGC0LIM = 0x0018 // (total of 25 inner loop iterations
PTGC1LIM = 0x0001 // total of two outer loop iterations
PTGHOLD = 0x0046 // 5 μs x 14 clocks/μs
PTGADJ = 0x000E // 1 μs x 14 clocks/μs
PTGSDLIM = 0x0000 // no Step delay
PTGBTE = 0x0000 // no broadcast triggers
PTGQPTR = 0x0000 // start of Step queue
PTGCST = 0x8200 // after PTGQPTR is initialized
Step Commands
// include the XC header file to define all register and bit names
#include <xc.h>
/* PTG Commands */
#define PTGCTRL (0x0<<0)
#define PTGADD (0x1<<4)
#define PTGCOPY (0x1<<4)
#define PTGWHI (0x4<<4)
#define PTGIRQ (0x7<<4)
#define PTGTRIG (0x8<<4)
#define PTGJMP (0xA<<4)
#define PTGJMPC0 (0xC<<4)
#define PTGJMPC1 (0xE<<4)
// Outer loop
_STEP0 = PTGWHI | 0x1; // Wait for positive edge trigger 1
_STEP1 = PTGCTRL | 0x8; // Start PTGT0, wait for time out
_STEP2 = PTGIRQ | 0x1; // Generate IRQ 1
// Inner loop
_STEP3 = PTGTRIG | 0x3; // Generate output trigger 3 to start ADC conversion
_STEP4 = PTGCTRL | 0x9; // Start PTGT1, wait for time out
_STEP5 = PTGJMPC0| 0x3; // Jump to STEP3 if PTGC0! = PTGC0LIM, increment PTGC0
// End inner loop
_STEP6 = PTGADD | 0x1; // Add PTGADJ to PTGT0LIM
_STEP7 = PTGJMPC1| 0x0; // Jump to STEP0 if PTGC1! = PTGC1LIM, increment PTGC1
// End outer loop
_STEP8 = PTGIRQ | 0x4; // Generate IRQ 4
_STEP9 = PTGCOPY | 0x8; // Copy PTGHOLD to PTGT0LIM (restore original value)
_STEP10 = PTGJMP | 0x0; // Jump to start of queue
#include <xc.h>
/* PTG Commands */
#define PTGCTRL (0x0<<0)
#define PTGADD (0x1<<4)
#define PTGCOPY (0x1<<4)
#define PTGWHI (0x4<<4)
#define PTGIRQ (0x7<<4)
#define PTGTRIG (0x8<<4)
#define PTGJMP (0xA<<4)
#define PTGJMPC0 (0xC<<4)
#define PTGJMPC1 (0xE<<4)
// Outer loop
_STEP0 = PTGWHI | 0x1; // Wait for positive edge trigger 1
_STEP1 = PTGCTRL | 0x8; // Start PTGT0, wait for time out
_STEP2 = PTGIRQ | 0x1; // Generate IRQ 1
// Inner loop
_STEP3 = PTGTRIG | 0x3; // Generate output trigger 3 to start ADC conversion
_STEP4 = PTGCTRL | 0x9; // Start PTGT1, wait for time out
_STEP5 = PTGJMPC0| 0x3; // Jump to STEP3 if PTGC0! = PTGC0LIM, increment PTGC0
// End inner loop
_STEP6 = PTGADD | 0x1; // Add PTGADJ to PTGT0LIM
_STEP7 = PTGJMPC1| 0x0; // Jump to STEP0 if PTGC1! = PTGC1LIM, increment PTGC1
// End outer loop
_STEP8 = PTGIRQ | 0x4; // Generate IRQ 4
_STEP9 = PTGCOPY | 0x8; // Copy PTGHOLD to PTGT0LIM (restore original value)
_STEP10 = PTGJMP | 0x0; // Jump to start of queue