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8-bit PIC® MCU Enhanced Mid-Range Instruction Set
Last modified by Microchip on 2023/11/22 16:34
This applies to the PIC16F1xxx and PIC16LF1xxx families of PIC® MCUs.
Byte Operations
Skip Operations
Literal Operations
Inherent Operations
Information
If the Program Counter (PC) is modified, or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP.
If this instruction addresses an INDF register and the MSb of the corresponding FSR is set, the instruction requires one additional instruction cycle.
If you need to work with Microchip Support staff directly, you can submit a technical support case. Keep in mind that many questions can be answered through our self-help resources, so this may not be your speediest option.
