High-Level Overview
Last modified by Microchip on 2026/03/31 09:26
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The purpose of the Analog-to-Digital Converter (ADC) architecture overview diagram is to show how the ADC core, data channels, and analog inputs are functionally connected.
- ADC module structure:
- The ADC module includes five ADC cores, designated ADC1 through ADC5.
- Each ADC core has multiple dedicated data channels.
- Data channels:
- Data channels select which analog inputs to use through multiplexers, controlled by settings like Positive Input Selection (PINSEL[3:0]) and Negative Input Selection (NINSEL[1:0]).
- ADC1, ADC2, ADC3, and ADC4 each support up to eight data channels.
- ADC5 supports up to 16 data channels.
- Each data channel can be linked to any input pin and can have its own sampling time, trigger, and operating mode.
- Analog inputs:
- Positive input signals from other modules go to the positive multiplexer (mux) in the ADC core.
- Negative input pins go to the negative mux.
- All these input options are available to every data channel in the same ADC block.
- The number of available analog inputs depends on the device’s package size. See the data sheet pin diagrams for more details.
- Operation:
- The ADC core uses the data channel’s settings (input selection and sampling time) to process the analog signal.
- After conversion, the result goes to the data channel’s result buffer (based on its sampling mode: single or accumulation) and can be sent to a digital comparator if enabled.