dsPIC33A 12-bit 40MSPS Analog-to-Digital Converter (ADC) Deep Dive
Single-Channel Periodic Conversion
| Multi-Channel Conversion Trigger | Conversion Trigger Guidance |
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In this final example, we examine a single-channel analog-to-digital conversion performed at regular intervals.
Building on the principles established in the multi-channel scenario, this configuration is most efficiently managed using either Direct Memory Access (DMA) or direct CPU reads.
When DMA is configured in One-Shot mode, it can reliably support conversion rates of approximately 18 MHz, as demonstrated. DMA can also accommodate trigger and conversion rates up to 20 MHz; however, each application should be evaluated to ensure overall system performance remains acceptable. If multiple data channels are used within a specific Analog-to-Digital Converter (ADC) module, the inherent priority of data channels may influence performance.
Alternatively, the CPU can directly read each conversion result. The feasibility of using interrupts in this context requires further analysis.
In the following pages, we will explore the characteristics of both DMA and interrupt-based approaches to provide an initial understanding of when each resource may be appropriately implemented.