dsPIC33A 12-bit 40MSPS Analog-to-Digital Converter (ADC) Deep Dive
Secondary Accumulators
| Digital Comparators | Gain and Offset Calibration |
Click Play ► to listen to the commentary.
Across all the data channels, there are 48 primary result accumulators (ADnCHxDATA) and 10 secondary accumulators (ADnCHxACC). The last two data channels in each Analog-to-Digital Converter (ADC) are equipped with these 32-bit secondary accumulators.
Table 1: Channels with Implemented Secondary Accumulators
| ADC Number | Channel Number | Secondary Register |
|---|---|---|
| 1 | 6 | AD1CH6ACC |
| 7 | AD1CH7ACC | |
| 2 | 6 | AD2CH6ACC |
| 7 | AD2CH7ACC | |
| 3 | 6 | AD3CH6ACC |
| 7 | AD3CH7ACC | |
| 4 | 6 | AD4CH6ACC |
| 7 | AD4CH7ACC | |
| 5 | 14 | AD5CH14ACC |
| 15 | AD5CH15ACC |
The secondary accumulator (ADnCHxACC) collects and sums data from the primary accumulator (ADnCHxDATA).
Enable this feature by setting the ACCRO bit (ADnCHxCON2[31]). When ACCRO is set to 1, both ADnCHxDATA and ADnCHxACC support roll-over, allowing for uninterrupted accumulation over multiple sampling cycles.
As illustrated in Figure 1, secondary accumulators function as Second Order Cascaded-Integrator-Comb (CIC) filters, enhancing digital signal processing. Though some CIC operations, such as differentiation, must be implemented in application software. For implementation details, refer to the code example in the product data sheet.
Figure 1
Click Play ► to listen to the commentary.
As mentioned above:
- The secondary accumulator (ADnCHxACC) is implemented on the last two data channels of each ADC.
- The secondary accumulator (ADnCHxACC) sums the results from the primary accumulator (ADnCHxDATA).
The simple block diagram (Figure 2) illustrates how the output of the primary accumulator is summed with the contents of the secondary accumulator and is stored back into the secondary accumulator.
Figure 2
This sum of sums enables advanced digital filtering, such as COMB filter functions, and can be used to detect data slopes across multi-sample operations.