Gain and Offset Calibration
Last modified by Microchip on 2026/03/31 11:11
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For optimal performance, gain and offset calibration can be performed periodically on the Analog-to-Digital Converter (ADC).
Offset calibration is performed automatically at device startup, with the ADC hardware executing offset calibration. Startup calibration requires approximately 5,000 ADC TAD clock cycles. With an ADC clock of 80 MHz (TAD = 12.5 ns), calibration takes approximately 62.5 µs.
Offset calibration can also be triggered during run-time, either by software request by setting the CALREQ bit (ADnCON[29]), or automatically at set intervals.
Automatic recalibration is enabled by the ACALEN bit (ADnCON[28]). The time between calibration cycles is set in the CALRATE[1:0] bits (ADnCON[27:26]), with times ranging from 1 second to just over 1 hour. Auto recalibration timing is approximate and dependent on the 32 kHz oscillator accuracy since it is clocked by the 32 kHz LPRC.
Offset calibration can also be triggered during run-time, either by software request by setting the CALREQ bit (ADnCON[29]), or automatically at set intervals.
Automatic recalibration is enabled by the ACALEN bit (ADnCON[28]). The time between calibration cycles is set in the CALRATE[1:0] bits (ADnCON[27:26]), with times ranging from 1 second to just over 1 hour. Auto recalibration timing is approximate and dependent on the 32 kHz oscillator accuracy since it is clocked by the 32 kHz LPRC.
Gain error compensation is managed through software. For detailed information and a code example, refer to the data sheet.
The precision of startup hardware calibration is limited, and after each ADC enable cycle, the gain and offset errors may be different. When a more precise and repeatable gain is required, the application can use reference voltages to measure the gain error and apply the corrective coefficient to the conversion results.
If the ADC clock frequency changes after calibration, a recalibration is required.
The precision of startup hardware calibration is limited, and after each ADC enable cycle, the gain and offset errors may be different. When a more precise and repeatable gain is required, the application can use reference voltages to measure the gain error and apply the corrective coefficient to the conversion results.
If the ADC clock frequency changes after calibration, a recalibration is required.
Both offset (zero point) and gain (slope) are critical calibrations to maximize and optimize ADC performance. If your application requires high precision, this special feature is for you.