Which Type of ZSM is the Best?

Last modified by Microchip on 2024/01/12 12:21

Here are some of the reasons the type of Zero Sequence Modulation (ZSM) matters:

  • Realizability: the most important thing is to achieve a desired average output voltage. Any of these approaches (except "no shift") meets this criterion.
  • Switching losses: the top/bottom/top-and-bottom clamp methods reduce switching losses.
  • Conduction losses: techniques that keep the per-phase duty cycle nearer to 50% and away from the extremes (0%, 100%) distribute conduction losses more evenly between upper and lower switches, and reduce the conduction losses very slightly due to the effect on ripple current.
  • Ripple current: here's where things get a little tricky. The ripple current caused by the switching frequency and motor inductance is difficult to analyze in general. For any given operating point (specific duty cycle values on phases A, B, and C) it's possible to determine the ripple current waveform and its harmonics, although it takes a bit of number-crunching. The good news is that in most cases, the motor inductance is high enough that it doesn't matter much.
  • Ease of computation: CPU time limitations make it desirable to calculate the zero-sequence offset with a simple algorithm. Some of these ZSM techniques can be difficult to compute efficiently. More on this below:

The Conventional Space Vector PWM (CSVPWM) technique is fairly easy to compute. Given three duty cycles Da0, Db0, Dc0, calculate:


Conventional Space Vector PWM

and add this number to each of the duty cycles.

ZSM example

This effectively computes the center of the largest and smallest duty cycle and adjusts it up or down so that the center is moved to 1/2. In other words, we clamp the midpoint of the three-phase set of duty cycles to 50%, hence the name "midpoint clamp" used here.

This also has the effect of causing an equal margin at the ends of the range: for a set of three‑phase duty cycles, if the span is defined as span limits then the total margin total margin is split equally in half at each end.

It also produces the exact same result as computing on-times by first determining which sector the operating point is in, as described in the paper by van der Broeck et al.

Just as a practical example: suppose the output of the Clarke transform yields (Da0, Db0, Dc0) = (0.423, -0.345, -0.078). For this set, the minimum value is -0.345 and the maximum value is 0.423; the average of these is 0.039, implying a zero-sequence shift of 0.5 - 0.039 = 0.461; if we add 0.461 to each duty cycle we get (Da, Db, Dc) = (0.884, 0.116, 0.383). You'll notice this yields an 11.6% margin from both 0% and 100% duty cycles.

The top and bottom clamp computations are very similar. For top-clamp, add the following to each duty cycle:


top and bottom clamp calculation

For bottom-clamp, add the following to each duty cycle:


bottom clamp equation

All three of these can be generalized to:


All three of these can be generalized

with k = 1 for top-clamp, k = 0 for bottom-clamp, and k = ½ for CSVPWM.

The top-and-bottom clamp technique requires choosing whether to use the top-clamp or the bottom-clamp technique at different points in the commutation cycle. Probably the easiest method to use is to take the initial three-phase set (Da0, Db0, Dc0), and check how many of these values are greater than their mean, which is zero if using the output of the Clarke transform. If two values are greater than the mean, then the largest amplitude duty cycle is negative and the bottom-clamp method is used. If only one value is greater than the mean, then the largest amplitude duty cycle is positive and the top-clamp method is used. For a three-phase set with a mean value of zero, this decision can be made by taking a bitwise XOR of the three values, and choosing the top-clamp method if the resulting sign bit is 0, or the bottom-clamp method if the resulting sign bit is 1.

Methods that involve unnecessary computation

The other three methods (third-harmonic, minimum shift, and nip & tuck) are not particularly practical to compute. Here's why:

Suppose you have a three-phase set of sine waves of constant frequency and known amplitude and phase:


a three-phase set of sine waves of constant frequency and known amplitude and phase

Then it turns out that the third-harmonic and nip & tuck methods have a zero-sequence shift which is fairly simple to calculate, given the amplitude A and phase angle θ:

For 3rd harmonic, 3rd harmonic

For nip & tuck:


for Nip and tuck

which looks complicated, but it's not that hard to compute.

Here's the problem: in real motor drives, we don't have direct access to θ — at least not to the value of θ used in the above equations. There is a phase shift between the angle of the output voltage, the electrical angle, and this phase shift changes with time. The angle we know in a FOC motor controller is the electrical angle θe. What we typically use for the a, b, and c phase voltage is:


typically use for the a, b, and c phase voltage because we know the electrical angle

where Vd and Vq are voltage vector outputs of a control loop in the synchronous frame. The relationship between the phase angles θ and θe is:


The relationship between the phase angles θ and θe

and the relationship between the amplitude A and the d and q phase voltages is the relationship between the amplitude A and the d and q phase voltages In order to calculate the zero-sequence shift due to third-harmonic or nip & tuck, we need to calculate a phase angle and amplitude of the d,q voltage vector: essentially, a rectangular to polar conversion. The other methods don't require phase angle and amplitude and are therefore computationally less expensive than these methods.

The minimum shift isn't quite as bad, but it does involve looking at each of the three-phase voltages and comparing them with the positive and negative voltage limits to see which phases would exceed the limits. This requires six comparisons. If the amplitude is small, none of the phases would exceed the limits. If the line-to-line amplitude is between 3√2 and 1.0 of the voltage capability, then only one of the six comparisons will be true. At most, one voltage is outside the voltage capability without a zero-sequence shift, and adding the appropriate shift will make all three phases realizable. But in the overmodulation region, where the line-to-line amplitude is greater than the voltage capability, there are times when at least two of the unshifted phase voltages are outside the voltage capability, and this method does not provide a means of determining the best output voltage shift.

So which method should you use? CSVPWM is the best method in general, and you're probably already using it. If you've got a high-power or high-voltage system where switching losses are of concern, use the top-&-bottom clamp method if you have gate drives that can provide a sustained on-state for the top transistors, or the bottom-clamp method if the gate drive you are using cannot provide 100% duty cycle on the top transistors.

Thanks for reading! Have fun exploring our ZSM viewer, and best of luck on your next motor drive project!