Current Mode Modulator
Current Mode Control (CMC) improves by adding an inner current loop. Here, the inductor current is directly controlled, offering faster transient response and inherent current limiting. However, it introduces complexity with potential issues like sub-harmonic oscillation, requiring additional compensation. Pulse-width modulation is accomplished by comparing a voltage error signal (Vcntrl) with a ramp waveform (Vcs) derived from the output current. The clock signal initiates the ramp. This mode offers a fast response to changes in output current.
It uses Type-2 compensation to address a single-pole power stage for externally compensated devices. Any changes in input voltage (Vin) affect the inductor current, and since the inductor current is being monitored, a correction occurs faster than with voltage measurement (VM) control. As we are sensing the inductor current, the inductor pole is effectively eliminated, and the only pole that needs to be compensated is the output capacitor pole. Because we are sensing the current cycle by cycle, current limiting is inherently part of this control architecture. Slope compensation is needed to avoid sub-harmonic oscillations.