PIC32M Family Reference Manual

Last modified by Microchip on 2023/11/09 09:00

The PIC32M (MIPS®-based) Family Reference Manual provides details on the core, memory, and peripherals not covered in the device data sheets.

Please refer to the device-specific datasheet to determine which of the following sections are applicable to the device.

This family reference manual is not relevant for the PIC32C (Arm® Cortex®-based) devices.

Section 1. Introduction
Section 2. CPU for Devices with M4K® Core
Section 3. Memory Organization
Section 4. Prefetch Cache
Section 5. Flash Programming
Section 6. Oscillators
Section 7. Resets
Section 8. Interrupts
Section 9. Watchdog, Deadman, and Power-up Timers
Section 10. Power-Saving Modes
Section 12. I/O Ports
Section 13. Parallel Master Port (PMP)
Section 14. Timers
Section 15. Input Capture
Section 16. Output Compare
Section 17. 10-bit Analog-to-Digital Converter (ADC)
Section 19. Comparator
Section 20. Comparator Voltage Reference
Section 21. UART
Section 22. 12-bit High-Speed Successive Approximation Register (SAR) ADC
Section 23. Serial Peripheral Interface (SPI)
Section 24. Inter-Integrated Circuit™ (I²C)
Section 25. Analog-to-Digital Converter (ADC) with Threshold Detect
Section 27. USB On-The-Go (OTG)
Section 28. RTCC with Timestamp
Section 29. Real-Time Clock and Calendar (RTCC)
Section 30. Capture/Compare/PWM/Timer (MCCP and SCCP)
Section 31. DMA Controller
Section 32. Configuration
Section 33. Programming and Diagnostics
Section 34. Controller Area Network (CAN)
Section 35. Ethernet Controller
Section 36. Configurable Logic Cell
Section 41. Prefetch Module for Devices with L1 CPU Cache
Section 42. Oscillators with Enhanced PLL
Section 43. Quadrature Encoder Interface (QEI)
Section 45. Control Digital-to-Analog Converter (CDAC)
Section 46. Serial Quad Interface (SQI)
Section 47. External Bus Interface (EBI)
Section 48. Memory Organization and Permissions
Section 49. Crypto Engine and Random Number Generator (RNG)
Section 50. CPU for Devices with MIPS32® microAptiv™ and M-Class Cores
Section 51. Hi-Speed USB with On-The-Go (OTG)
Section 52. Flash Memory with Support for Live Update
Section 54. Graphics LCD (GLCD) Controller
Section 55. DDR SDRAM Controller
Section 59. Oscillators with DCO
Section 60. 32-Bit Programmable Cyclic Redundancy Check (CRC)
Section 62. Dual Watchdog Timer