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PIC32MX Memory Alignment

Last modified by Microchip on 2023/11/09 09:00

Since the PIC32MX memory system is 32-bits wide, a data access that is 32-bit (4-bytes, or WORD), or 16-bit (2-bytes, or HALF WORD) in size can either be aligned or unaligned:

  • (Naturally) Aligned Transfer: means that the data's address value is a multiple of the data's type-size (in bytes)
    • WORD size transfers are carried out to addresses that are a multiple of 4: 0x00000000, 0x00000004, 0x00000008
    • HALF WORD size transfers are carried out to addresses that are a multiple of 2: 0x00000000, 0x00000002, 0x00000004
  • Unaligned Transfer: means that the data's address does not follow the rules above.

MIPS® Release 2 requires "naturally" aligned transfers for normal load/store operations. Unaligned accesses using normal load/store operations will produce exceptions.

​In most cases, C compilers do not generate unaligned data accesses. It can only happen in the following cases:

  • Direct manipulation of pointers
  • Accessing data structures with "__packed" attributes that contain unaligned data
  • Inline/Embedded Assembly code

Several examples of "naturally" aligned and unaligned data transfers are shown below for a MIPS32® Little-Endian memory system:

memory alignment diagram