SAM D21 Serial Communication (SERCOM) Inter-Integrated Circuit (I²C) Slave Overview

Last modified by Microchip on 2023/11/14 18:23

The SAM D21 family of devices includes up to six instances of the Serial Communication (SERCOM) serial communication interface peripheral, which among other things, can be configured to be an Inter-Integrated Circuit (I²C) interface.

A SERCOM instance can be configured to be either an I²C master or an I²C slave. Both master and slave have an interface containing a shift register, a transmit buffer, and a receive buffer. In addition, the I²C master uses the SERCOM baud-rate generator, while the I²C slave uses the SERCOM address match logic. This peripheral is compatible with SMBus and PMBus.

This page focuses on the Slave mode of the SERCOM I²C peripheral. Some of the key features of the slave mode I²C operation are:

  • Operation in sleep modes
  • Wake on address match
  • 16-byte First In, First Out (FIFO) available and accessible with Direct Memory Access (DMA)
  • 2- or 4-wire modes available
  • 7- or 10-bit address match in hardware for:
    • Unique address (or general call address)
    • Address range
    • Two unique addresses

SAM D21 I2C block diagram

The I²C slave is byte-oriented and interrupt-based. The number of interrupts generated is kept at a minimum by the automatic handling of most events. There are two main strategies for handling I²C interrupts. Additionally, the peripheral offers a Smart mode, which allows for more automation of the operation without user interaction.

Basic I2C Transaction Diagram

Learn More

SERCOM I²C Slave Configuration
SERCOM I²C Slave Example Project