8-bit PIC® MCU Low-Power Strategies
The low-power features of 8-bit PIC® microcontrollers (MCUs) can extend battery life and reduce energy costs without compromising functionality. These features include multiple power-saving modes, such as Sleep, Idle, Doze, Deep Sleep, and Low Power Sleep modes and Peripheral Module Disable (PMD), which can significantly reduce power consumption.
This training is meant to provide an overview of various 8-bit PIC MCU low-power strategies. The modes and features described in the training may not be identical to your selected device. Please refer to the device datasheet for details.
Sleep
Sleep is a low-power mode crucial for battery-operated and power-sensitive applications, as it allows the microcontroller to conserve energy by shutting down most of the device's functions while retaining the contents of the registers and memory. When in Sleep mode, the Central Processing Unit (CPU) and most peripherals are turned off, significantly reducing power consumption. However, certain events, such as external interrupts or watchdog timer resets, can wake the microcontroller from Sleep mode, allowing it to resume normal operation. This feature is particularly useful in embedded systems where efficient power management is essential to extend battery life and reduce energy costs. Sleep mode is common for all 8-bit PIC MCUs.
How Does It Change the MCU?
- CPU and Program Memory
- Turned off
- Peripherals
- Stop operation as the primary clock source will be disabled. Some peripherals such as WDT, Timer1 and RTCC can run in Sleep mode if configured to do so
- Primary clock source (FOSC)
- Turned off unless specifically configured to remain running via the OSCEN register
- RAM
- No change except status bit(s) associated with entering Sleep mode
What Doesn’t Change?
- GPIOs
- Data memory
- SFRs
- Timer1, WDT if enabled
How Is It Activated?
- Instruction
- Sleep instruction
Code example:
Wake-up Options
- Any reset
- Program execution restarts at the reset vector
- Enabled interrupt source
- If GIE or GIEL/GIEH bit is set, code execution restarts at the associated ISR vector, if clear, code execution restarts at the next instruction after the SLEEP instruction
Power Savings
Relative power savings is significant as the CPU and primary clock sources are disabled.
Wake-up Time
Relative exit time varies as it depends on the primary clock source restarting. It will be long if an external crystal is the primary clock source or fairly short if the internal oscillator is used. A secondary clock source can be used while the primary oscillator is warming up using the Two-Speed Start-up feature to minimize the delay before code execution. Newer devices can keep the external clock running in Sleep mode via the OSCEN register.
Idle
Idle mode is specifically engineered to conserve power by disabling the CPU clock source but continuing to clock the peripherals. This selective shutdown enables the device to reduce its power consumption significantly while still being responsive to external events or internal conditions that require immediate attention, making it a good option for battery-powered and energy-sensitive applications.
How Does It Change the MCU?
The CPU clock source is disabled.
What Doesn’t Change?
- WDT, INTRC (if WDT is enabled) and Timer1
- Primary clock source
- The clock source and associated status bits are not affected
- RAM
- GPIOs
How Is It Activated?
Set the IDLEN bit to 1 and then execute a SLEEP instruction. The peripherals will be clocked from the clock source selected using the SCS<1:0> bits; however, the CPU will not be clocked. For newer devices, the clock source is selected with the FSCMCON register.
Code example:
SLEEP(); // Execute the SLEEP instruction
Wake-up Options
- Any reset
- Program execution restarts at the reset vector
- Enabled interrupt source
- If GIE or GIEL/GIEH bit is set, code execution restarts at the associated ISR vector, if clear, code execution restarts at the next instruction after the SLEEP instruction
- Enabled interrupt source
Power Savings
Relative power savings are moderate as the primary oscillator and peripherals are not affected.
Wake-up Time
Relative exit time is short as only the CPU needs to warm up before executing code again.
Doze
Doze mode allows for power saving by reducing clock speed for the CPU and Program Flash Memory (PFM) access, without affecting peripheral operations. Doze mode differs from Sleep mode because the system oscillators continue to operate, while only the CPU and PFM are affected. The reduced execution saves power by eliminating unnecessary operations within the CPU and memory.
How Does It Change the MCU?
CPU – clock speed ratiometrically reduced as defined by DOZE bits.
What Doesn’t Change?
- Primary clock source
- RAM
- GPIOs
How Is It Activated?
When the Doze Enable bit is set, the CPU executes only one instruction cycle out of every N cycles as defined by the DOZE bits. For example, if DOZE = 001, the instruction cycle ratio is 1:4. The CPU and memory execute for one instruction cycle and then lay Idle for three instruction cycles. During the unused cycles, the peripherals continue to operate at the system clock speed. If the Recover-on-Interrupt bit is set, the MCU will automatically exit Doze mode and clear the Doze Enable bit after an Interrupt Service Routine (ISR) has been entered. The Doze-on-Exit (DOE) bit can be used to automatically reenable Doze mode after the ISR is exited.
Code example
CPUDOZEbits.DOZE = '111'; //Set CPU Doze ratio to 1:256
CPUDOZEbits.DOZEN = 1; //Enable Doze mode
SLEEP(); // Execute the SLEEP instruction
Exit options
- Any reset
- Clearing DOZEN bit
- Entering an ISR with Recover-on-Interrupt bit (ROI) set
Power Savings
Relative power savings are moderate as the CPU and program memory clock speeds are reduced.
Wake-up Time
Relative exit time is short; typically one instruction cycle.
Deep Sleep (PIC18FXXJ Devices)
Deep Sleep is specifically engineered to drastically reduce power consumption when the microcontroller is not in active use, allowing for a significant extension of battery life in portable and low-power applications. When a PIC MCU enters Deep Sleep mode, the majority of its internal circuits are turned off, including system clocks and peripheral functions, leaving only a select few components, such as the watchdog timer and the ability to detect external events, operational. This state of minimal activity allows the device to maintain its context with very low current draw, enabling a return to full operation upon waking from Deep Sleep. This feature is particularly beneficial in applications where conserving power is paramount, such as in remote sensors, wearable devices, and other power-sensitive designs.
How Does It Change the MCU?
- CPU and Program Memory are disabled
- Peripherals
- Most peripherals are powered down
- RAM
- Because VDDCORE could fall below the SRAM retention voltage while in Deep Sleep mode, SRAM data could be lost in Deep Sleep. Exiting Deep Sleep mode causes a POR; as a result, most Special Function Registers will reset to their default POR values.
- GPIOs
- TRIS and LAT register values will reset but GPIO will not change after entering Deep Sleep. Upon exit, GPIOs will maintain their states until the RELEASE bit is cleared giving time for the software to update TRIS and LAT registers before their values are applied.
What Doesn’t Change?
- Peripherals
- RTCC will continue to run if enabled
- DSWDT, DSBOR continue to operate
- Primary clock source
- RAM
- DSGPR0 and DSGPR1 registers are preserved in Deep Sleep
- Program Counter is not affected
How Is It Activated?
Code example:
DSCONHbits.DSEN = 1; // Select Deep Sleep Mode
SLEEP(); // Enter Deep Sleep Mode
Wake-up Options
- /MCLR reset
- POR
- DSWDT
- RTCC alarm
- DSBOR
- INT0
- ULPWU
- After wake-up, software can determine the wake-up event using the DSWAKEH and DSWAKEL registers. These registers are cleared when Deep Sleep is entered.
Power Savings
Relative power savings are the highest in Deep Sleep mode as it disables the Vddcore regulator, thereby powering down the CPU, program memory and most peripherals.
Exit Time
Relative exit time is long as the LDO, primary oscillator, program memory and CPU must warm up prior to code execution.
Low-Power Sleep or Ultra-Low-Power Modes
Some PIC MCUs have internal LDO (Low Dropout) regulators that allow the device I/O pins to operate at voltages up to VDD while the internal device logic operates at a lower voltage. Newer PIC devices with internal LDOs, such as PIC18FxxQ or PIC18FxxK, offer user-selectable power options that are active while the MCU is in Sleep mode. This allows the user to balance power consumption with wake-up times for Sleep mode using the VREGPM bits in the VREGCON register, depending on the application requirements.
How Does It Change the MCU?
- CPU and Program Memory
- Turned off
- Peripherals
- Stop operation as clock source will be disabled. Some peripherals such as WDT and RTCC can run in Sleep mode if configured to do so.
- Primary clock source
- Turned off
- RAM
- No change except status bit(s) associated with entering Sleep mode
- LDO
- Power consumption changes according to the VREGPM bit settings. Lower power modes increase power savings in Sleep mode but also require longer wake-up times. Extended temperature devices, e.g. PIC18F26Q71-E/SO, should use the extended temperature setting (VREGPM = 0b11). This configures the device to reduce power consumption at higher operating temperatures.
What Doesn’t Change?
- Peripherals
- Brown-out Reset (BOR)
- Windowed Watchdog Timer (WWDT)
- External Interrupt
- Interrupt-on-Change
- Program Counter
- GPIOs
How Is It Activated?
Code example:
SLEEP(); // Enter Sleep Mode
Wake-up Options
- /MCLR reset
- POR
- Low Power BOR (LPBOR)
- Any interrupt except clock switch
Wake-Up Time
After wake-up, software can determine the wake-up event by reading the interrupt flag, PIRx, or INTCONx registers
Power Savings
- Relative power savings and wake-up times depend on the Voltage Regulator Power Mode Selection (VREGPM bits) as it modifies Vddcore behavior to customize CPU and program memory power consumption.
- Relative exit time will vary depending on the mode selection as the LDO, primary oscillator, program memory and CPU must warm-up prior to code execution.
Peripheral Module Disable (PMD)
The Peripheral Module Disable (PMD) feature allows developers to disable unused peripheral modules within the microcontroller, leading to significant reductions in power consumption. By providing the ability to selectively shut down unneeded components, the PMD system enhances the efficiency of 8-bit PIC microcontrollers, making them particularly suitable for power-sensitive applications. This capability not only conserves energy but also contributes to optimizing the performance and extending the battery life of embedded systems in which these microcontrollers are deployed.
How Does It Change the MCU?
- Peripherals
- Setting the PMD bit completely shuts down the peripheral, effectively powering down all circuits and removing all clock sources
- Peripheral held in reset
- Primary clock source
- Disabled for selected peripherals
- This results in fewer transistors transitioning states, resulting in lower power consumption
- RAM
- Attempts to read or write disabled peripheral SFRs are ignored
- Reading a disabled peripheral’s SFR returns zeros
- GPIO
- Analog outputs disabled, digital GPIO outputs read zeros
What Doesn’t Change?
- CPU speed
How Is It Activated?
- SFR
- PMD bits are generically named “xxxMD” and are located in the PMDx registers. For example, TMR0MD is the PMD bit for Timer TMR0
Code example:
Exit Options
- Any reset
- SFR write
- Wake-up considerations
- After disabling and reenabling PMD, the peripheral resets and must be reconfigured
Power Savings
Relative power savings is minimal (<100 microamps).
Wake-up Time
Relative exit time is moderate, the PMD bit must be cleared and the peripheral SFRs must be initialized.