dsPIC33A Operational Amplifier (Op Amp) Peripheral

Overview

On this page, you will learn about the operational amplifier (op amp) module in dsPIC33A microcontrollers (MCUs). This op amp offers high performance with up to 100 MHz bandwidth, differential inputs, and rail-to-rail input and output ranges. It can be enabled or disabled individually, and when disabled, it becomes high impedance. 

A key feature is user calibration of input offset voltage, which lets you measure and adjust the offset using an Analog-to-Digital Converter (ADC). You can calibrate for high power, low power, or both modes, and must trim both P and N channel pairs separately for best results. 

You will learn about the two main operation modes: Unity Gain Buffer, which is set internally for a gain of 1, and Non-Unity Gain, which uses external resistors to set the gain. The output can be connected internally to a Digital-to-Analog Converter (DAC) or monitored by an ADC, depending on the device. 

Common applications you will study include inverting and non-inverting amplifiers, where you will calculate gain and output voltage using simple formulas. By the end of this course, you will know how to configure, calibrate, and use the dsPIC33A op amp for various analog signal processing tasks. 

Features

• Up to 100 MHz gain bandwidth
• Common bias supply for the op amps
• Differential inputs
• Rail-to-rail input voltage range
• Works in conjunction with pad drivers
  • N-gate and P-gate output drivers
  • Hi-impedance when the op amp is disabled
  • Rail-to-rail output
• Amplifier internally compensated for gain ≥ 1x
• Individual enabling of op amps
• User calibration of input offset voltage

dsPIC33C to dsPIC33A New Feature: Op Amp Offset Calibration

• Users can measure and adjust the Offset.
• Offset voltage can be determined by measuring the input and output voltage of the op amp using an ADC.
• Depending on the application, the user may wish to calibrate the Input Offset Error of High Power mode, Low Power mode, or both.
• Both P and N channel differential pairs need to be trimmed independently to avoid interactions during the calibration procedure.

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Peripheral Architecture

Op Amp Block Diagram

• OA1IN+ : Positive op amp input
• OA1IN- : Negative op amp input
• OA1OUT : Op amp output

Operation

Op Amp as Unity Gain Buffer

The op amp can be configured as a unity gain buffer without any external connections. It is configured by setting the UGE bit to 1 in Control Register AMPxCON1. In this mode, the op amp output is internally shorted to the inverting input, and the resulting gain is 1.

Op Amp Gain Control Using External Resistor

The op amp supports non-unity gain configurations using external resistors. This is configured by setting the UGE bit to 0 in register AMPxCON1. This example shows the op amp configured as a non-inverting amplifier with a gain of 1 + RF/R1.

Op Amp Output Monitor

The op amp can be connected to the DAC internally by setting the REFEN bit. The output signal of the op amp can be monitored by enabling an internal connection to ADC by setting the OMONEN bit.

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Applications

Inverting Amplifier

In addition to the non-inverting amplifier shown above, the op amp can be configured as an inverting amplifier. This is done by connecting Vin to the inverting input of the op amp through resistor R1 and the non-inverting input to ground. Then connect a feedback resistor, RF, between OAxIN- and OAxOUT. The resulting voltage gain is (-RF/R1). 

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