Driving Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor (SiC MOSFET)
MOSFET Turn-On Idealized Waveforms
Inductive Switching
Figure 1 shows an idealized waveform for a silicon carbide metal-oxide-semiconductor field-effect transistor (MOSFET) where there is no ringing or parasitics–everything is perfect. If you look at the circuit on the left in Figure 1, it is a half-bridge connected to an inductor. This is called inductive switching. The inductor forces the current to flow regardless of whether the switches are on or off. The inductor is always going to pull the same amount of current. It will cause that current to flow through the body diode and keep the voltage node between the two MOSFETs very close to the ground.
When you want to turn on the MOSFET, consider the following:
- The blue line is the Drain to Source voltage.
- There is voltage across the MOSFET because of the VBUS and ground.
- You need current conducting through the capacitance of this field-effect transistor (FET) to make up for the current flowing through the diode. This is because you are unable to switch until there is current flowing.
- The diode can be reversed bias, which can be block voltage. Thus, the current has to go to zero, meaning the inductor current needs to flow through here. Additionally, you will see the drain to source voltage here remains high even though there's current flowing.
Once you get to the inductor current, it allows the drain voltage to drop. During this transition, you are dissipating power.
Figure 1: MOSFET Turn-on Idealized Waveform
Miller Capacitance
Figure 2 illustrates the relationship between the gate charge (x-axis) and the gate-source voltage (Vgs, y-axis) of a MOSFET during switching. One key feature of this graph is the Miller Plateau, which is a region where the gate-source voltage (Vgs) remains relatively constant despite an increase in gate charge.
Understanding the Miller Plateau:
- Gate Charge (Qg): This represents the total charge required to switch the MOSFET from the off state to the on state. It is a cumulative measure of the charge needed to change the gate voltage.
- Gate-Source Voltage (Vgs): This is the voltage applied between the gate and source terminals of the MOSFET. It controls the conductivity of the MOSFET channel
- Miller Plateau Region: During the switching process, as the gate charge increases, the Vgs initially rises until it reaches a point where it flattens out. This flat region is known as the Miller Plateau. During this plateau, the gate voltage remains nearly constant while the gate charge continues to increase.
Significance of the Miller Plateau:
- Charge Redistribution: The Miller Plateau occurs due to the redistribution of charge between the gate-drain capacitance (Cgd) and the gate-source capacitance (Cgs). This is often referred to as the Miller effect.
- Switching Delay: The duration of the Miller Plateau is critical because it represents a period during which the MOSFET is transitioning between its off and on states. The length of this plateau can affect the overall switching speed of the MOSFET.
- Power Dissipation: During the Miller Plateau, the MOSFET is partially on, which can lead to significant power dissipation. Understanding and minimizing the duration of this plateau is important for efficient MOSFET operation.
In summary, the Miller Plateau is a key characteristic of MOSFET switching behavior, indicating a phase where the gate voltage remains constant while the gate charge increases. This region is influenced by the Miller capacitance and plays a crucial role in determining the switching speed and efficiency of the MOSFET.
Figure 2: Miller Capacitance
Gate Drivers for Si and SiC
When driving a MOSFET, several key requirements must be considered. Due to the high voltages and fast switching speeds involved, isolating the gate drive is essential. This necessitates an isolated gate drive circuit as well as an isolated bias supply for the gate driver. Additionally, you must be mindful of the power requirements for this bias supply.
Fast switching introduces common mode effects that can lead to issues such as shoot-through, which can cause problems in your controller and low-voltage circuits, as well as electromagnetic interference (EMI). Therefore, it is crucial to address these concerns to ensure reliable operation.
When switching quickly, there are specific concerns related to shoot-throughs or short circuits. It is important to implement protective measures to prevent these short circuits from occurring and to safeguard the system against potential damage.
Figure 3: Gate Drives for Si and SiC
Gate Driver Circuit
The circuit shown in Figure 4 provides a basic overview of the requirements for driving Silicon Carbide (SiC) MOSFETs. The diagram illustrates the need for an isolated gate driver and an isolated bias supply. The isolated bias supply provides the necessary power to apply gate voltage and current, enabling the MOSFET to turn on and off effectively.
Isolation is crucial for both safety and noise immunity. Most control signals operate at low voltage levels and are often on the safer side of the power supply. Isolation protects these low-voltage control signals from the high voltages encountered by the MOSFETs, ensuring the system's safety and reliability.
Figure 4: Gate Driver Circuit
Gate Driver Power Loss
The input to a MOSFET essentially behaves like a capacitor. When transitioning from one voltage level to another, the charge on the gate increases. This charge, found in the datasheet graph shown in Figure 5, represents the gate charge required to switch the MOSFET from the turn-off voltage to the turn-on voltage.
To calculate the power loss associated with the gate driver, you multiply the gate charge by the gate-to-source voltage and the switching frequency. This gives you the power required to drive the MOSFET.
For example, consider a large discrete MOSFET with a gate charge of 230 nanocoulombs (nC). If this MOSFET operates at a switching frequency of 100 kilohertz (kHz), the power requirement from the isolated bias supply to drive this MOSFET would be approximately 0.5 watts (W).
Figure 5: Gate Driver Power Loss
Silicon Carbide Switches
The circuit shown in Figure 6 illustrates a typical drive circuit for a half-bridge configuration. It includes a high-side MOSFET and a low-side MOSFET, both housed in TO-247 four-lead packages. These packages feature a separate lead for gate drive return, which will be discussed in more detail in the following slides.
The circuit employs an isolated gate driver with distinct pull-up and pull-down pins for turning the MOSFET on and off. This gate driver receives an isolated bias voltage for both the turn-on and turn-off states. Due to common mode requirements, separate isolated voltages are necessary for the high-side and low-side drivers. The high-side driver is referenced to the switch node, while the low-side driver is referenced to the ground.
Figure 6: High-Frequency Switching
This circuit shown in Figure 7 illustrates a typical isolated drive bias supply for a half-bridge configuration. It features two transformers with separate outputs: one for the high side and another isolated output for the low side. Both outputs are isolated from the primary side. This topology employs an unregulated push-pull configuration, which requires a well-regulated input voltage to achieve accurate output voltages. The input voltage is supplied by a small buck converter.
A PIC10F322 microcontroller is used to generate pulses with a duty cycle close to 50 percent, driving the push-pull configuration. On the secondary side, the circuit includes rectification and filtering components, including common mode filtering. This setup allows the voltages to be split into a positive voltage (e.g., +20 volts) and a negative voltage (e.g., -5 volts) with reference to the source of the MOSFET being driven, providing the necessary turn-on and turn-off voltages.
The high-side MOSFET switches and is referenced to the switch node, experiencing rapid common mode voltage changes. These changes can reach very high voltages (800 to 1000 volts or more) and occur at fast speeds (50 to 100 volts per nanosecond). Such rapid changes cause common mode currents to flow through the capacitance between the primary and secondary windings of the transformer. These common mode currents can introduce issues on the low voltage side, potentially affecting the power supply and the controllers that drive the MOSFETs.
Figure 7: Isolated Gate Drive BIas Supply
Common Mode Effects
The typical components that span the isolation barrier include the power supply transformer for bias, as well as signal isolators and gate drivers. Common mode displacement currents can cause significant issues, such as latch-up, false triggering, or even short circuits due to interference on the primary side.
Refer to the waveform in Figure 8 (circled) for displays of switching waveforms and gate drive waveforms for a multiphase circuit. Notice the ringing on these gate circuits, which is a result of common mode noise originating from other areas within the high voltage side of the MOSFET. This common mode noise can disrupt the operation of the circuit, leading to potential reliability and performance issues.
Figure 8: Common Mode Effects
Fast Switching Effects
High dv/dt and Shoot-Through Current
Another effect of fast switching is the occurrence of a shoot-through current and the coupling of the drain voltage, or drain switching voltage, of a MOSFET onto its gate. This can be seen in Figure 9. If you examine the voltage waveform, you'll notice that it switches very quickly, with high turn-on and turn-off speeds. When the MOSFET turns on, current flows through the gate-to-drain capacitance inside the MOSFET.
This phenomenon can be described by the equation I = C * dV/dt. If the switching speed (dV/dt) is very high and capacitance is present, even if small, it will result in current flow. The voltage developed here acts as a voltage divider between the gate-to-source capacitance and the impedance of the gate driver circuit. This can cause a small glitch to appear on the low-side MOSFET, even when it is supposed to be turned off.
If this glitch is significant enough, it can cause the low-side MOSFET to turn on while the high-side MOSFET is also on, leading to a condition known as a shoot-through or a short circuit between the bus and ground. There are several methods to minimize or attenuate this effect, ensuring the reliable operation of the circuit.
Figure 9: Fast Switching Effects
Mitigating High dv/dt and Shoot-Through Current
One effective method to minimize or attenuate these issues is to use a negative voltage on the gate. By applying a lower voltage to the gate, a much larger glitch or voltage spike is required to turn the MOSFET on. This increases the threshold for unwanted activation.
Another method is the use of a Miller clamp as shown in Figure 10. The output of the gate driver typically has some resistance, which controls the switching speed of the devices. However, this resistance also increases the impedance when the device is off, making it more susceptible to noise or voltage spikes at this node. A Miller clamp addresses this by providing a low-impedance path to the ground once the device turns off, effectively holding the gate voltage steady and minimizing any voltage glitches.
Additionally, selecting MOSFETs with a favorable ratio of gate-to-drain capacitance to gate-to-source capacitance is crucial. A smaller gate-to-drain capacitance compared to the gate-to-source capacitance means that the capacitive divider will allow only a smaller voltage to appear on the gate, reducing the likelihood of unintended turn-on. This results in a higher impedance on the gate-to-drain path than on the gate-to-source path.
Finally, good PCB layout practices are essential. Placing the driver very close to the MOSFET and ensuring low impedance in both the gate drive and the return path can significantly reduce noise and improve overall circuit performance.
Figure 10: Mitigating High dv/dt and Shoot-Through Effects
Short Circuit Protection
Let's discuss short-circuit protection. Refer to the circuit shown in Figure 11. If a voltage spike occurs or if a gate drive signal forces both the high-side and low-side MOSFETs to turn on simultaneously, a shoot-through current will result. This shoot-through current increases the voltage drop across the MOSFET, as described by the equation V = I * RDSon, where V is the voltage from the drain to the source, I is the current, and RDSon is the on-resistance of the MOSFET.
A desaturation (desat) circuit shown in Figure 11, originally developed for IGBTs and bipolar transistors, can be used to sense the voltage across the MOSFET during its on-time. The circuit is configured so that if the voltage across the MOSFET exceeds a certain preset reference value, it indicates excessive current flow, prompting the gate driver to turn off the MOSFET.
The desat circuit operates by using a diode to block voltage when the MOSFET's drain voltage is high. Once the MOSFET turns on, the voltage across the drain-to-source is sensed by the circuit. During the on-time, a current is forced to flow through a resistor and the diode, developing a voltage across the resistor. As the MOSFET voltage increases, this sensed voltage also increases. When it exceeds the preset reference value, the circuit assumes excessive current flow and signals the gate driver to turn off the MOSFET.
Critical to the desat circuit's operation is the selection of the diode. A diode with a high reverse recovery time can introduce noise and cause improper triggering of the desat circuit. Additionally, the blanking time—how long the device waits before measuring current or voltage after turning on—must be carefully chosen. Selecting the appropriate resistor and threshold value is also essential to ensure accurate and reliable short-circuit protection.
Figure 11: Short Circuit Protection