MPLAB® Harmony v3 Peripheral Libraries on SAM D5x/E5x: Step 2
Configure RTC Peripheral Library
Under the bottom left Available Components tab, expand Peripherals > RTC.
Verify that the RTC is set to run at 1 kHz internal ultra-low-power clock.
When a module is added to the project graph, the MPLAB® Harmony Configurator (MHC) automatically enables the clock to the module. The default RTC source is an internal 1 kHz ultra-low-power clock (OSCULP1K).
Go back to the project graph and configure the RTC PLIB to generate a compare interrupt every 500 milliseconds.
Configure I²C Peripheral Library and I²C pins
Under the Available Components tab, expand Peripherals > SERCOM.
Open the Pin Configuration tabs by clicking MHC > Tools > Pin Configuration.
Select the MHC Pin Settings tab and sort the entries by Port names as shown in the accompanying image.
- Enable I²C Clock (TWI_SCL) on PA22 (Pin #92)
- Enable I²C Data (TWI_SDA) on PA23 (Pin #93)
Configure Universal Synchronous Asynchronous Receiver Transmitter (USART) Peripheral Library and USART pins
Under the tab Available Components tab, expand Peripheral > SERCOM.
Select the Pin Table tab and then scroll down to the SERCOM2 module as shown in the accompanying image.
Configure DMA Peripheral Library
Launch DMA Configurator by going to the MHC tab in MPLAB X IDE and then selecting Tools > DMA Configuration.
Click on the DMA Settings tab. Configure Direct Memory Access (DMA) Channel 0 to transfer the application buffer to the USART TX register. The DMA transfers one byte from the user buffer to the USART transmit buffer on each trigger.
Based on the trigger source, the DMA channel configuration is automatically set by MHC.
- Trigger Action: action taken by DMA on receiving a trigger.
- One beat transfer: generally used during a memory-to-peripheral or peripheral-to-memory transfer.
- One block transfer: generally used during the memory-to-memory transfer on a software trigger.
- Source Address Mode, Destination Address Mode: select whether to increment the Source/Destination Address after every transfer. Automatically set by the MHC, based on the trigger type. For example:
- If the trigger source is USART transmit, then the Source Address is incremented, and the Destination Address is fixed.
- If the trigger source is USART receive, then the Source Address is fixed, and the Destination Address is incremented.
- Beat Size: size of one beat. The default value is 8 bits. For example:
- If the SPI peripheral is configured for 16-bit/32-bit mode, then the beat size must be set to 16-bits/32-bits respectively.
- Burst Length: this is a very fast data transfer mode. It can perform up to 16 transfers (beats) before releasing the control of the system bus back to the CPU. The default value of burst length is a single beat (one transfer).
- In the default configuration, USART is configured for one-byte data at a time. So, the burst length is configured as a single beat.
- FIFO Threshold: FIFO threshold level determines the size when the data in the internal DMA FIFO should be transferred to/from memory.
- When the size of the data filled (in the internal DMA FIFO) becomes equal to the FIFO threshold size, the actual burst transfer (from the internal DMA buffer to the USART peripheral) takes place, thereby improving the overall performance.
- In the default configuration, the DMA transfers 1 beat of data as burst transfer.
Disable USART interrupt: