eMMC Support for SAMA5D27 SOM1 EK Board
Introduction
This page summarizes eMMC support for the SAMA5D27 SOM1 EK board. It includes tested eMMC devices from different vendors and versions, along with boot results, Linux® detection logs, and basic performance measurements.
Because eMMC modules, adapters, and carrier boards can differ in electrical characteristics, compatibility and performance may vary depending on signal integrity, PCB layout, and bus capacitance.
This page also explains how to configure SDMMC0 drive strength in U-Boot and AT91Bootstrap to improve reliability when using certain eMMC devices or adapter boards.
Drive Strength Configuration
The SAMA5D27 SOM1 EK board comes by default with a standard medium drive strength for the SDMMC0 lines. This means that there is a standard current consumption, Electromagnetic Interference (EMI), according to the data sheet, as specified in the Electric Characteristics chapter.
Because some of the eMMC boards come with adapters to SD™ cards or are soldered directly on custom PCBs, the medium default drive strength might not be enough to drive the lines from the MPU, SOM board, EK board, SD card slot, additional PCB and wiring to the memory.
In this case, the MPU can be configured to increase the drive strength on the lines to ensure signal integrity, power loss or other reasons.
Whether or not the increase in drive strength is needed depends on the adapter board. Some adapter boards have a higher capacitance. The standard imposes that the total capacitance of the host + device + bus does not exceed 20 pF. If this capacitance is exceeded, higher drive strength is required in order to accommodate the loss in signal integrity.
By patching the device tree in U-boot, you can select an overlay that will increase the drive strength and apply it over the stock device tree when booting Linux. This means that only by a single command, the drive strength can be increased or restored at boot time.
To achieve this, the bootm command in U-boot must be altered to add the sdmmc0_hi overlay, as in the following example:
bootm 0x24000000#kernel_dtb${at91_overlays_config}#sdmmc0_hi
We provide an out-of-tree overlay for this specific purpose. The overlay needs to be applied to our dt-overlay-at91 tree. The overlay is provided on this page as * 0001-sama5d27_som1_ek-add-overlay-for-high-drive-strength.patch: overlay for high drive strength for sdmmc0.
For more information about FIT images and how to use them in U-boot, see the "Using FIT Image and Device Tree Overlays" page. This overlay is named sdmmc0_hi, and it can be added manually as needed from the U-boot prompt whenever needed.
AT91Bootstrap needs to have the SDMMC0 lines configured with a high drive strength if we plan to use AT91Bootstrap to load the U-boot image from the same eMMC. AT91Bootstrap provides a board file where the PIO controller is configured for SDMMC0 and the drive strength is selected.
AT91Bootstrap Modifications
In AT91Bootstrap, the drive strength may need modifications.
Here is an example of how to set the drive strength for the SDMMC0 pins to High. Regarding drive strength and when it's required, check the "Drive Strength Configuration" section.
diff --git a/board/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/sama5d27_som1_ek/sama5d27_som1_ek.c
index 0297eed..7ee184a 100644
--- a/board/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -517,16 +517,16 @@ void at91_sdhc_hw_init(void)
#ifdef CONFIG_SDHC0
const struct pio_desc sdmmc_pins[] = {
- {"SDMMC0_CK", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_CMD", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DEFAULT, PIO_PERIPH_A},
- {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},
+ {"SDMMC0_CK", AT91C_PIN_PA(0), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_CMD", AT91C_PIN_PA(1), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+ {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
{"SDMMC0_RSTN", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SDMMC0_VDDSEL", AT91C_PIN_PA(11), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SDMMC0_WP", AT91C_PIN_PA(12), 1, PIO_DEFAULT, PIO_PERIPH_A},
Tested eMMCs
The following eMMC devices were tested with AT91Bootstrap, which will auto-detect the bus width (8-bit, 4-bit or 1-bit) and enable DDR if possible.
Next, we test Linux to enable DDR mode, if possible, and display information.
We create a 100 Mbyte file and read it from the eMMC and display the required time in Linux.
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