Hello FPGA
Demo
Demo Board Overview |
Create the Project
The first step is to launch Libero® SoC. You can launch Libero SoC from the Windows® Start menu or the shortcut on your desktop. From the Libero SoC GUI, click Projects > New to open the new project wizard.

Figure 1: New Project Window
In the Project Details window, give the project a name, 'LED_Blink', and then choose a location. We will use the root level of our D: Drive for this project.
You can also add a description. Enter 'Hello FPGA demo' in the Preferred HDL type pull-down menu. VHDL or Verilog may be selected; select Verilog. Click Next.

Figure 2: Project Details
The device selection page will open. We can use the filters at the top to select the device package. Select the following:
- Family: SmartFusion2
- Die: M2S010
- Package: 256 VF
- Speed: STD (standard)
- Temperature: COM (commercial).

Figure 3: Device Selection Window
Then, click Next which takes us to the device settings page.
The default IO technology is LVC MOS, 2.5V. Change it to LVCMOS 3.3V because most of the IOs are 3.3V. We have two choices for the PLL power supply, either 2.5V or 3.3V. SmartFusion® 2 PLLs can operate at either voltage. On the Hello FPGA kit, however, the PLLs operate off 3.3V, so select 3.3V. Click Finish.

Figure 4: PLL Power Supply Selection
Import HDL File
Now that we've created our project, we will import an HDL source file. We can do that from the Design Flow tab by selecting Create HDL, right-clicking, and choosing Import Files...

Figure 5: Import and HDL File
The Import Files dialog box will open. Select the file named LED_block.v. This file is a description file of a counter that can drive the LEDs. Click Open.

Figure 6: File Selection
The file will be visible on the Design Hierarchy tab after building the hierarchy.

Figure 7: Design Hierarchy Tab
If you double-click on the name of the file, you can open it in the editor. There are three inputs where PB1_debug and PB3_debug connect to switches on the Hello FPGA board and CLK_50 MHz connects to the 50 MHz oscillator on the board.
There are three outputs, LED1_debug, LED2_debug, and LED3_debug. The outputs drive LEDs on the Hello FPGA board.

Figure 8: Open the File in the Editor
Here we are describing a counter. The counter is reset with PB1_debug. If PB1_debug is pressed or low, the counter outputs will all be 1's and the LEDs will turn off. When PB1_debug is released, the counter will decrement.

Figure 9: Counter Description
Here we are describing a 2 to 1 multiplexer. The selector for the multiplexer is PB3_debug. If PB3_debug is released, three consecutive counter bits will drive the LEDs and they'll toggle a counting pattern. If PB3_debug is pressed, all of the LEDs will be driven by the same counter bit, and they'll turn on and off together.

Figure 10: 2 to 1 Multiplexor Description
Before we can move on, we need to set led_block as the root level. Setting something as a root level lets Libero® know that that is the level of hierarchy that you want to use for Simulation, Synthesis, and Layout. Right-click on the LED_block and select Set as Root. The root level will be displayed in bold font.

Figure 11: Set as Root
Synthesis
Now that we've imported the source file and set it as the root level, we're ready to synthesize. But before that, we want to import a constraint file for the Synthesis and Place and Route tools. Go to the Design Flow tab and double-click on Manage Constraints to open the constraint manager.

Figure 12: Manage Constraints
Click the Timing tab and click the Import button to import a timing constraint file.

Figure 13: Timing Tab
Use the timing constraint file LED_blink.sdc. Select the file and click Open.

Figure 14: Open the Timing Constraint File
The file will show up on the Timing tab. Select the file for Synthesis, Place and Route, and Timing Verification.

Figure 15: Timing Tab
Double-click on the filename to open the file in the editor. You will see the command create_clock and then the name CLK_50 MHz and then the period 20. This defines a clock on the signal name CLK_50MHz with a 20 ns period or 50 MHz. Select the X to close out the editor tab. Click Save.
Now we can go back to the Design Flow tab. Double-click Synthesize and run the synthesis tool. When the synthesis step is completed successfully, a green check mark will appear next to Synthesize on the Design Flow tab. You can select the Reports tab and see the Resource Report. If you scroll down, you'll see the resource usage. This shows the exact number of LUTs, D flip flops, and IOs used in this design.

Figure 17: Symthesis Tool
Making Pin Assignments
After Synthesis, the next step is to run Place and Route. Before we run Place and Route, however, we want to make the pin assignments. This is done by going back to the Constraint Manager tab and selecting the I/O Attributes tab. We then open the graphical IO editor tool by clicking the Pull-Down menu next to edit and choosing Edit with I/O Editor.
The I/O Editor is a graphical tool that displays all of the ports in the design. In the Port View tab, you can choose the IO standard, the PIN number, and several other attributes as well.

Figure 19: Port View
Start making the PIN assignments by typing in the field under PIN Number. The PIN assignments can be found in the Hello FPGA schematic. Refer to this course's front page for a link to the Hello FPGA schematic and other documentation.
The last two assignments, PB1_debug and PB2_debug are for the push button switches. Those switches are assigned to 1.5V, so we need to change the IO standard to LVCMOS15. Now that we've made all the pin assignments, click the Save button, and then close the I/O Editor.

Figure 20: PIN assignments
The I/O Attributes tab will show a file named user.PDC and it's selected for Place and Route.

Figure 21: IO Attributes
Place and Route and Bitstream Generation
Now that we have made the pin assignments, we can run Layout. We'll also need to generate a bitstream. We can do all of that in one step by scrolling down and double-clicking on Export Bitstream, to open the window.

Figure 22: Export Bitstream
Now choose the bitstream type DAT, because that's what we're using when we program with an external processor. Click OK.

Figure 23: Bitstream Format
Libero will run Place and Route and generate the appropriate bitstream to use with the PIC32 to program the SmartFusion 2 FPGA. When Place and Route is finished, we will see a green checkmark in the Design Flow tab. We'll also see a green check mark next to Generate FPGA Array Data and Export Bitstream. The log window will tell us that the bitstream was successfully exported.

Figure 24: Export Bitstream
Programming
Now that we've generated the bitstream, the next step is to program the Hello FPGA kit. Plug the USB cable into the board and the other end of the cable into the PC.
The Hello FPGA kit comes with the GUI that is used for programming the FPGA board and running the demos. Open the Hello FPGA GUI by clicking the Windows Start Menu and scrolling to the Hello FPGA GUI program group, expand the group, and click Hello FPGA GUI to open the GUI.

Figure 25: Start Menu
This is the Hello FPGA GUI. When the GUI opens, the FPGA Programmer tab will be visible. The DAT File field will point to the programming file for one of the three demos that are included with the kit.

Figure 25: Hello FPGA GUI
Navigate to the Libero project and select the programming file that we created earlier. Select the Project > designer > led_block > export and then select led_block.dat.

Figure 26: DAT File Selection
Next, confirm the correct COM port is selected, then click the CONNECT button to connect to the host PC. The connect button turns green. You want to have a successful connection. Before programming, make sure that the action field says Program. You can use the pull-down menu to change it if you need to. Click Run to start programming.

Figure 27: Start Programming
A dialog box will open indicating Programming Successful and prompt you to restart the board by unplugging and replugging the USB cable.

Figure 28: Programming Successful
After programming, if PB1_debug is pressed, the LEDs will turn off. If PB1_debug is released, the LEDs will toggle in a counting pattern. If PB3_debug is pressed, the LEDs will turn on and off together. If PB3_debug is pressed, the LEDs will toggle in a counting pattern again.

Figure 29: LEDs
Video Course
This course is also available in video format at Microchip University as Hello FPGA.