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SAM L10/L11 Device Service Unit (DSU)

Last modified by Microchip on 2023/11/15 17:33

Overview

The Device Service Unit (DSU) provides a means to detect debugger probes. This enables the Arm® Debug Access Port (DAP) to have control over multiplexed debug pads and CPU reset. The DSU also provides system-level services to debug adapters in an ARM debug system. It implements a CoreSight Debug ROM that provides device identification, as well as identification of other, debug components within the system. Hence, it complies with the ARM Peripheral Identification specification. The DSU also provides system services to applications that need memory testing, as required for IEC60730 Class B compliance.

The DSU can be accessed simultaneously by a debugger and the CPU, as it is connected to the High-Speed Bus Matrix. It implements communication channels between the device and external tools which can be used at boot time to make use of Boot ROM services. For security reasons, some of the DSU features will be limited or unavailable when the Debug Access Level (DAL) is less than 0x2.

DSU Features

  • CPU reset extension
  • Debugger probe detection (Cold- and Hot-Plugging)
  • 32-bit cyclic redundancy check (CRC32) of any memory accessible through the bus matrix
  • Arm® CoreSight™ technology-compliant device identification
  • Two debug communications channels
  • Two boot communications channels
  • Debug access port security filter
  • On-board memory built-in self-test (MBIST)

Related Peripheral

The related peripheral to change DAL is the NVM Controller (NVMCTRL).