SAM D21 DFLL48M 48 MHz Initialization Example

Last modified by Microchip on 2023/11/10 11:08
Contents

Objective

This page provides a code example that configures the SAM D21 Clock System to produce the maximum GCLK_MAIN frequency for the MCU (48 MHz) using the DFLL48M clock source. The DFLL48M uses the XOSC32K source as a reference, which requires an external 32.768 kHz crystal to be connected between the XIN32 and XOUT32 pins. Additionally, a second, 8 MHz Clock Generator is configured/enabled (using OSC8M) for use as an asynchronous clock source for the peripherals. The project also enables the GCLK_MAIN clock to be output on port pin PA28.

The clock system configuration is depicted in the accompanying diagram.

samd21-code-dfll48m-init-block-diagram.png

This project also configures the SysTick Module to produce interrupts every millisecond, using the generated CPU clock frequency (48 MHz). The SysTick handler routine is used to count these interrupt events and toggle the onboard LED once every second.

The code example targets the ATSAMD21J18A MCU, running on the SAM D21 Xplained Pro board.

This code example uses a direct/indirect MCU register C-coding style (i.e., no software framework) and is built using the GCC compiler toolchain within the Atmel Studio 7 IDE.

Visit the following page to learn more details about the clock system and how to configure the clocks:

Reference Materials

We recommend extracting the ZIP file to your C:\ folder.

See the folder C:\MTT\32arm\samd21\code-examples-gcc\clock-system\dfll48m-initialization containing the solution dfll48m-initialization.atsln.

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Connection Diagram

SAM D21 Xplained Pro contains an Embedded Debugger (EDBG) that can be used to program and debug the ATSAMD21J18A using the Serial Wire Debug (SWD) interface. The EDBG also includes a Virtual Com port interface over UART and a Data Gateway Interface over SPI and TWI, and it monitors four of the SAM D21 GPIOs. Atmel Studio 7 is used as a front end for the EDBG.

LED0 is driven by this application and is connected to port PB30 as shown in the accompanying image.

xpro-diagram-dfll48m-initialization.png

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Procedure

Attach the SAM D21 Xplained Pro board to your computer using a USB A-to-MicroB cable. Start Atmel Studio 7. If the board has been successfully enumerated, you should see the board image come up in Atmel Studio as shown in the accompanying image.

samd21-xplained-pro-enum-success-6739.png

The board is identified by the last four digits of its serial number (see the sticker on the bottom of the board). In this example, the last four digits are "6739".

1. Open the Solution

Select File > Open > Project/Solution…

as7-open-dfll48m-init-solution.png

Navigate to the solution folder and select the dfll48m-initialization.atsln solution file.

as7-open-dfll48m-init-solution-detail.png

2. Configure the Debugger

Next, you need to configure the debugger in Atmel Studio to discover and connect to the target EDBG IC on your Xplained Pro board.

First, select Project > Properties as shown in the accompanying image.

as7-config-debugger-dfll48m-init-1.png

Next, under the project's Tool settings, select your EDBG target from the pull-down. Select SWD as the interface as shown in the accompanying image.

as7-config-debugger-dfll48m-init-2.png

Save the tool setting by clicking the Save All button as shown in the accompanying image.

as7-config-debugger-dfll48m-init-3.png

3. Rebuild/Program the Target

Finally, select the Start Without Debugging icon in Atmel Studio which information re-builds the HEX file from the project source code, (ii) downloads/programs the HEX file onto the target MCU, (iii) and releases the target MCU Reset pin, allowing the program to execute.

as7-start-without-debugging-dfll48m-init.png

If prompted, upgrade the EDBG firmware on the board.

as7-edbg-firmware-upgrade.png

You need to click on Start Without Debugging again after an EDBG firmware upgrade in order to rebuild/program the target.

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Results

dfll48m-initialization-results.png

LED0 toggles every second. PA28 outputs GCLK_SIGNAL (48 MHz).

Due to PCB parasitic components, the observed clock signal frequency on PA28 is best viewed on an oscilloscope using AC signal coupling.

Conclusions

This project has provided a simple example of how to configure the Clock System on SAM D21 MCU to produce a 48 MHz GCLK_MAIN clock.

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