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Learn About the SAM E51 DMAC

Learn About the SAM E51 DMAC

Last modified by Microchip on 2026/07/13 14:32
    Introduction to SAME51 Direct Memory Access Controller (DMAC) Bus Architecture   

Introduction

Modern embedded systems are expected to process data efficiently while maintaining low power consumption and predictable real-time behavior. In many applications, large volumes of data must be moved between memory and peripherals such as timers, communication interfaces or analog converters. If every data movement were handled directly by the Central Processing Unit (CPU), valuable processing time would be lost and power consumption would increase. To address this challenge, the SAM E51 family of microcontrollers from Microchip Technology integrates a Direct Memory Access Controller (DMAC).

Direct Memory Access (DMA)

DMA is a hardware-based method for transferring data between memory and peripherals without continuous involvement from the CPU. On the SAM E51, this function is implemented by the DMAC, a dedicated subsystem connected to the internal system bus.

Once a DMA transfer is configured and started, the DMAC becomes responsible for moving data. The CPU is free to perform other tasks or can enter a Low-Power Sleep mode while the transfer proceeds. This separation of responsibilities improves overall system efficiency, reduces interrupt overhead and enables higher data throughput.

SAM E51 Direct Memory Access Controller (DMAC) Block Diagram

The SAM E51 DMAC supports all common data movement patterns. Data can be transferred from one memory region to another, from memory to a peripheral, from a peripheral to memory, or even directly from one peripheral to another. Peripheral-to-peripheral transfers are particularly powerful when paired with the Event System, as entire data paths can operate without waking the CPU.

In this training, we will introduce the SAM E51 DMAC and cover its communication buses, units of transfer, transfer control, transfer descriptors, arbitration, DMAC Cyclic Redundancy Check (CRC) and associated input and output events. Let’s get started!

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