Getting Started Using Libero® SoC Design Suite

Last modified by Microchip on 2023/11/09 09:07

PolarFire® FPGA Design Flow Tutorial

This tutorial demonstrates how to implement basic PolarFire®  FPGA designs using the Libero® SoC Design Suite. The design used in this tutorial runs on an MPF300T_ES connected to a PolarFire Splash Kit. This tutorial is set up as six separate lessons. Each lesson adds complexity and builds upon the previous lesson.

After completing this tutorial, you will be familiar with the following:

  • Creating a Libero SoC PolarFire FPGA project
  • Compiling a design
  • Assigning simple I/O pin constraints
  • Programming the device
  • Testing your design

PolarFire SoCs are supported in Libero SoC Design Suite v12.0 and above.

Tutorial Requirements

  •  Software Requirements
    • Microsemi Libero SoC v12.0 (or above)
  • Hardware Requirements
    • PolarFire Splash Kit (MPF300-SPLASH-KIT-ES).
  • Source Files
    • There are no source files required for this lab. The design will be created from scratch.

If you are new to FPGA designs and would like more background information how to design Microchip FPGAs you may find the information on Microchip's FPGA Design Process useful.

This tutorial has six lessons and a total of 37 steps that illustrate how to implement a design for a PolarFire SoC. While the design in this tutorial is a simple AND gate, the individual steps demonstrated are identical to those needed for a practical design.

Lesson 1 - Creating the PolarFire FPGA Project

The first step in an FPGA design is to open Libero SoC and create a blank project.

Click Start > Programs > Microsemi Libero SoC v12.x > Libero SoC v12.x, or click the shortcut on your desktop. The Libero SoC PolarFire Project Manager opens, as shown in the accompanying figure.

Start Image

Open Libero's new project wizard by clicking New on the Start Page tab or by clicking Project > New Project from the Libero SoC menu.

Libero's new project wizard

Enter the information shown below in the Project Details pane of the New Project dialog box then click Next.

  • Project Name: "PolarFire_basic" (Note: name is case sensitive for Verilog designs.)
  • Project Location: "<C: or D:>/Microsemiprj" (or the path where the files were extracted if different)
  • Preferred HDL type: Select either VHDL or Verilog based on your HDL preferences

New Project Details

This tutorial uses the standard MPF300T on the development board. Enter the following in the Device Selection pane of the New Project dialog box then click Next.

  • Family: PolarFire
  • Die: MPF300T_ES
  • Package: FCG484
  • Speed: -1
  • Range: EXT

Device Selection

Enter the following in the Device Settings pane of the New Project dialog box then click Finish.

  • Core Voltage: 1.0 (default)
  • I/O Settings
    • Default I/O technology: LVCMOS3.3V
    • Reserve pins for probes: checked (default)
  • System controller suspended mode: un-checked (default)

Device Settings

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Lesson 2 - Creating Your Design

Once a Libero project has been created (or opened) a design needs to be entered.
We will use the Design Flow window to manage most of the flow. The Design Flow window has multiple tabs. You can switch between these tabs by clicking the tab name at the bottom.

Create Smart Design

In the Design Flow window, double-click Create SmartDesign and name your design “andgate” then click OK. This opens the SmartDesign Canvas.

Name New Design

Select the Catalog tab in the Design Flow window and expand the Macro Library section.

Macro Library Dialog

Drag the AND2 gate from the Catalog onto the blank SmartDesign Canvas on the right.

Use the mouse to select A and then right-click to bring up the menu. From the menu select Promote to Top Level, this creates an external connection on the device that we will connect to a switch. Repeat for B and Y.

Promote to Top menu selection

When you have completed this you should have the view shown in the accompanying image:

AND Gate View

Click the Generate Component button on the top of the canvas to generate the design.

Generate Componen Button

Confirm the message "'andgate' was successfully generated” appears in the Libero SoC Log tab.

andgate' was successfully generated message

Select the Design Hierarchy window and click the Build Hierarchy button.

Build Hierarchy button

“andgate” appears in bold font on the Design Hierarchy tab indicating that it is the root level.

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Lesson 3 – Synthesis and Pin Assignment

Now that the design has been entered we will translate the written design into a form that is machine-readable. For SoCs, this process is called synthesis. Before the synthesized design is placed into a device we will also set up the design constraints. For this tutorial, the only constraints we will place are the pin assignments.

It is quite common for a designer to perform a function simulation of their designs prior to synthesis. For this simple example, we are omitting the simulation step

Double-click Synthesize under Implement Design in the Design Flow window to synthesize the design with Synplify Pro. Synplify Pro adds I/O pads to the design. A green check mark appears in the Design Flow window to indicate synthesis was successful.

A green check mark appears in the Design Flow window to indicate synthesis was successful

Since this is a very simple design, the only other thing we need to do is tell the tools which I/Os to use. Double-click Manage Constraints in the Design Flow window to open the Libero SoC Constraints Manager.

Manage Constraints in the Design Flow window

Confirm the I/O Attributes tab is selected. Use the pull-down menu on the Edit button to select Edit with I/O Editor (highlighted in the figure above) to open the I/O Editor.

Select the Port View tab of the I/O Editor.

Port View tab of the I/O Editor

Use this window to set the I/O Standard and Pin Number. Confirm that LVCMOS33 is the I/O Standard for each pin.

Click Unassigned in the Pin Number column to reveal available I/O pins. Make the following assignments: (you can type the pin number in the field or use the pull-down menu to select the pin).

  • A -> K5
  • B -> K4
  • Y -> P7

Make sure your connections match the image below then click on File > Commit and close the window, File > Exit.

Review Pin Connections

Push-Button Switches

The PolarFire Splash Kit comes with four debug push-button switches that are connected to the PolarFire FPGA. The table below lists the onboard push-button switches.

Switch NumberFPGA Pin NumberFPGA Pin Name

Push Button Switches Schematic

User LEDs

The board provides user access to eight active low LEDs, which are connected to the PolarFire device for debugging applications. The table below lists the onboard debugging LEDs.

Reference Board LEDFPGA Pin NumberFPGA Pin Name

Active low LEDs

If you click the green arrow button at the top of the Design Flow window, you can now run the design all the way through Place and Route.

Design Flow Window

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Lesson 4 - Programming the Design

This step will run FlashPro in batch mode to program the PolarFire MPF300TS on the PolarFire Splash Kit board shown in the accompanying image.

PolarFire Splash Kit board

Prior to programming (and powering up) the PolarFire Splash Kit board, confirm that the jumpers are positioned as shown in the accompanying table.

J5, J6, J7, J8, J9Top edge of the board near the 12V power supply input.Jumpers to select the PolarFire JTAG or A2F JTAG. Pin 1–2 programming the power sequence and monitoring chip through the FTDI. Pin 2–3 for programming the PolarFire FPGA through FTDI.2-3 installed (programming through FTDI)
J11Near the reset switch (SW2).Jumper to select the external JTAG or the on-board FTDI chip for programming the PolarFire device. Pin 1–2 for programming through the FTDI chip.1-2 installed
J10Near the reset switch (SW2).Jumper to select programming through external SPI Flash.Open
J3Near the Power On/Off switch.Jumper to select the core voltage. Pin 1–2 installed for 1.05V. Pin 1-2 open for 1.0V.Open
J4Right of the AC jack (J9).Jumper to select the SW3 input or the ENABLE_FT4 232 signal from the FT4232H chip. Pin 1-2 for manual power switching using SW3. Pin 2-3 for remote power switching using the GPIO capability of the FT4232 chip.1-2 installed
J32Lower right-hand corner of the board.Jumper to select the PolarFire VCCIO voltage (VCCIO_HPC_VADJ) to 1.2V, 1.5V, 1.8V, 2.5V, or 3.3V. Pin 1-2: 3.3. Pin 3-4: 2.5 V. Pin 5-6: 1.8 V. Pin 7-8: 1.5 V. Pin 9-10: 1.2V.1-2 installed

Connect 12V power supply brick to the J2 connector.

Connect a USB cable between the J1 mini USB connector and the host PC.

Slide the main power switch SW1 to ON position.

Install the FlashPro4 drivers if prompted. The drivers are located in the <Libero SoC PolarFire v2.2 Installation Directory>\drivers folder.

Expand Program Design in the Design Flow window. Right-click Run PROGRAM Action and select Run to generate the programming file and begin programming.

FlashPro runs in batch mode and programs the device. Programming messages are visible in the Libero SoC Log window (programmer number will differ).

Do not interrupt the programming sequence.

The following message should be visible in the Reports view under Run PROGRAM Action when the device is programmed successfully (programmer number will differ):
programmer 'E2001JZK2X' : device 'MPF300T_ES' : Executing action PROGRAM PASSED.

Run PROGRAM Action

A green check mark will appear next to the Program Design and Run PROGRAM Action in the Design Flow window, to indicate programming completed successfully.

Program Design and Run PROGRAM

Click Project > Save from the Libero menu to save your completed project. Do not close it, we will use it again.

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Lesson 5 - Running the design

This is a very simple design designed to show an AND gate.

  • Observe LED1 with Switch 5 and Switch 6 released – it will illuminate
  • Press Switch 5 and observe the behavior of LED1 – it will turn off
  • Press Switch 6 and observe the behavior of LED1 – it will turn off
  • Press both switches and LED1 will turn off.

Intuitively, for an AND gate, one would expect that both switches should be depressed to illuminate the LED.

Look again at the images from the User’s Guide on page 13. Releasing the switch generates a logic one, which illuminates the LED. We need to invert the input signals to illuminate the LED when both switches are pressed.

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Lesson 6 - Design Iterations in Libero SoC Design Suite PolarFire Device

Reopen the SmartDesign Canvas and look for the tab.

Hold the CTRL key and select input ports A and B of AND2_0, then click the right mouse button to bring up the menu. Select Invert to invert the signals, this is built into the SmartDesign capabilities to invert or Tie off any I/O.

SmartDesign capabilities

The ports are inverted.

The ports are inverted

Click the Generate Component button, this will reset the rest of the compilation functions but keeps your I/O constraints.

Right-click Run PROGRAM Action on the Design flow window and select Update and Run to run all the steps in between and reprogram the device in one click. If it seems to be taking a while, check to see if the Warning dialog box about running in Non-Timing-Driven mode is behind your active window.

Observe the correct behavior on the board by pressing both switches simultaneously to illuminate LED1.


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