Implementing Low-Power Modes on SAMA7D65 Using MPLAB® Extensions for VS Code®
Introduction
The SAMA7D65 series is a high-performance, ultra-low-power Arm® Cortex®-A7 processor-based microprocessor (MPU) running at up to 1 GHz.
This training module describes how to enter and exit SAMA7D65 low-power modes by providing Linux® and bare-metal software examples using the MPLAB® Extensions for VS Code®, as well as hardware application schematics. All low-power configurations and performance metrics described in this document have been verified using the SAMA7D65 Curiosity Development Board
This guide provides a practical framework for validating the low-power performance of the SAMA7D65 using the PAC1934, a high-accuracy, four-channel power monitoring Integrated Circuit (IC). By following this guide, you can achieve real-time visibility into current draw across various power rails, including VDDCORE, VDDCPU, VDDIODDR, and VDD_3V3 during operation under the low-power modes. We will use the PAC193X Windows® Graphical User Interface (GUI) to measure and visualize power consumption.
This training module is a supplement to the SAMA7D6 series data sheet. It should be used in conjunction with the following reference documents:
| Document Type | Available |
|---|---|
| Data Sheet | SAMA7D6 Series Data Sheet |
| User's Guide | SAMA7D65 Curiosity Kit User Guide |
| Application Note | SAMA7D6 Series Power Consumption |
| Data Sheet | MCP16502 (Optimized Power Management Integrated Circuit (PMIC) for SAMA7) |
Hardware Used
- SAMA7D65 Curiosity Development Board
- MPLAB PICkit™ 5 In-Circuit Debugger
- Two USB2.0 Micro-B cables
- Debugger Adapter Board
- Universal Asynchronous Receiver-Transmitter; Transistor-Transistor Logic (UART-TTL) cable
- microSD™ card
Software Prerequisite
Download VS Code.
Start VS Code and search for "MPLAB Extension Pack" in the Extension Marketplace (Ctrl + Shift + X).
Install the MPLAB Extension Pack.
Download and install the PAC193x Windows Demo or the PAC193x Windows Demo application.
Download and install Tera Term or any other serial terminal software.
Hardware Setup
Power up the board through the USB-A port (J3) (USB-C® connector) or by an external 5.0 VDC power supply to (J1).
Connect the USB2.0 Micro-B cable to connector J5 (PAC) to monitor the power.
Connect the FTDI cable to the serial debug port (J35) on the SAMA7D65 Curiosity Kit.
Remove/open the jumper from connector J39 to disable Quad Serial Peripheral Interface (QSPI) boot and connector J36 to disable NAND boot.
Connect the external MPLAB PICkit 5 debugger to the 20-pin JTAG debug port (J38).
Close pin 1 and 2 of jumper J6.
Close pin 1 and 2 of jumper J7.
Steps 7 and 8 (J6 and J7 jumper settings) are required to enable power measurement using PAC1934 TWCK selection on USB. Detailed information on the channel mapping can be found in the Power Measurement Connection Table in the "SAMA7D65-Curiosity Kit User Guide".
PAC193x GUI Configuration
As per the "SAMA7D65-Curiosity Kit User Guide," four power rails are monitored: VDD_3V3, VDDIODDR, VDDCORE, VDDCPU. Each rail has a 0.047Ω shunt resistor for current measurement. Configure PAC193x GUI as follows.
Open the PAC193X Windows GUI application. Select the device and go to Settings > Set Constants. In the Sense Resistor Value window, set 0.047 ohms for the four channels.
Ensure the device is connected to the PAC193X Windows GUI application. In the PAC Settings, select Bi-Directional I measurement. In the plot pane, choose the measurement type, such as Power or Current, based on your monitoring needs.
For this training module, we are measuring power.
SAMA7D65 Low Power Modes Overview
The SAMA7D65 has five main low-power modes: Backup, Backup Self-Refresh (BSR), Ultra-Low-Power 1 (ULP1), Ultra-Low-Power 0 (ULP0) and Idle.
These modes help the device save energy. They range from using very little power (only a few microamps) to a bit more (a few milliamps). They also differ in how fast they wake up; some take only a few microseconds, while others take longer to get back to full speed.
This is a simple breakdown of how the device works in each mode:
- Backup mode: This is the most extreme power-saving mode. Almost everything is turned off except for the essential keep-alive parts (like the Real-Time Clock). It uses the least energy but takes the longest to wake up.
- Backup Self-Refresh (BSR) mode: Similar to Backup mode, BSR mode keeps the external memory (DDR/SDRAM) powered in Self-Refresh mode. This allows the system to remember what it was doing so it can start back up faster.
- Ultra-Low-Power 1 (ULP1) mode: This is a middle-ground mode. The main processor stops, and most clocks are turned off, but the system stays ready to wake up much faster than in Backup mode.
- Ultra-Low-Power 0 (ULP0) mode: This is a lighter version of ULP1. The system is still very low-power, but more parts of the chip stay awake or ready, allowing for a very quick return to work.
- Idle mode: This is the simplest mode. It just stops the CPU from working when there is nothing to do. The rest of the chip stays powered and ready to respond instantly to any new task.
This training is designed to guide you through the complete lifecycle of developing a power-optimized bare-metal application using MPLAB Extensions for VS Code. You will learn how to configure the modern VS Code environment and use the PAC1934 to validate energy consumption across every major power state.
- Section I: Environment Setup and Application Foundation
- Creating a bare-metal application using the MPLAB Extensions for VS Code, debugging the application and establishing a baseline power measurement using the PAC193x Windows GUI
- Section II: Backup Mode
- Implementing and measuring power consumption under Backup mode, where the MPU is powered down and only the slow clock and wakeup logic remain active
- Section III: Backup Self-Refresh - BSR
- Configuring BSR to maintain DDR3L memory content while the processor is in Backup mode, and measuring the resulting power trade-off
- Section IV: Ultra-Low Power 0 - ULP0
- Implementation of ULP0, focusing on shutting down the core and high-speed clocks while maintaining specific peripheral readiness
- Section V: Ultra-Low Power 1 - ULP1)
- Executing power measurement under ULP1, the state that allows for the fastest wakeup times while significantly reducing power compared to Active mode
- Section VI: Idle Mode
- Measuring power under Idle Mode, where the CPU clock is stopped, but all peripherals and memory remain active for immediate task resumption