MPLAB ICD 3 Debug Executive

Last modified by Microchip on 2023/11/09 09:10

Debug executive diagram

 

Debug Executive

A small program used in conjunction with your application code to facilitate the on-chip debug process. It is used by all Microchip PIC MCU and dsPIC DSC debug tools including the MPLAB® REAL ICE in-circuit emulator, MPLAB ICD 3 in-circuit debugger, and PICkit™ 3 in-circuit debugger, as well as the stand-alone starter kits.

The Debug Executive

When using an in-circuit debugger to debug your program, some of the chip's resources are reserved for debugging functions. Your code isn't the only thing that gets programmed into the device. A small program called the Debug Executive is automatically added to your code when you build and program for debugging. Its job is to run commands sent by the PC and to control the debug process. While your program is running, it sits quietly in the background. However, whenever a breakpoint is reached or a command is received from the PC, control over the device is transferred to the debug executive.

The debug executive requires a small amount of code space, a few registers in data memory, and one or two levels of stack. In addition to on-chip resources, the ICSP™ lines must be dedicated to the debug process. This means that the I/O pins multiplexed with debug clock, data, and PGM (if used) may not be used by your application while debugging.

Resource Needs

  • Exclusive use of two I/O pins
  • Shared control of the MCLR pin
  • Some file registers (RAM)
  • Some program memory locations (Flash)
  • One or two hardware (return) stack locations

To determine what device memory and other resources are reserved when debugging, see MPLAB X IDE Start Page > Learn & Discover > Getting Started > Users Guide & Release Notes > Reserved Resources.

shows where to find help info in MPLAB X

Shows where reserved resources in the release notes

Example Resource Needs

RI, ICD3, PK3RI, ICD3RI, ICD3, PK3
DeviceHeaderAlt. HeaderProgram Memory ReservedFile Registers ReservedProgram Memory Reserved (SW BP Support)File Registers Reserved (SW BP Support)MCLR Pin Reserved / SharedLVP DisabledDevice Pins ReservedStack Reserved
PIC18F4520
PIC18LF4520
N/AN/A0x7DC0-0x7FFF0x05F4-0x05FF
0x0F9C
0x0FD4
0x0FDB-0x0FDF
0x0FE3-0x0FE7
0x00FEB-0x0FEF
0x0FFD-0x0FFF
0x7D30-0x7FFF0x05EF-0x05FF
0x0F9C
0x0FD4
0x0FDB-0x0FDF
0x0FE3-0x0FE7
0x0FEB-0x0FEF
0x0FFC
0x0FFD-0x0FFF
Reserved, Shared with VppRequiredPgm Pins2 Levels, TOS registers
PIC24FJ128GA010AC162065 (optional)AC244022 (optional)None0x0800-0x084FNoneNoneReserved, Shared with VppN/APgm Pins, Emul PinsNone