Advantages of Microchip FPGAs

Introduction

In this training, we will describe some of the advantages of Microchip's Flash Field Programmable Gate Arrays (FPGAs).

Why Flash FPGAs Have Low Power Consumption

Static Random Access Memory (SRAM) FPGAs have a unique power profile that can affect system design choices. In addition to the classic static and active power consumption, SRAM-based FPGAs also have an inrush current which is caused by core/cell logic contention because the SRAM configuration cell is in an indeterminate state at power on. Additionally, there is configuration current that occurs when the device is being configured. The power requirements of SRAM FPGAs often lead to power supply upsizing.

Inrush Current

Flash FPGAs have minimal inrush current and no configuration current. Flash FPGAs have lower static power than SRAM FPGAs. Figure 1 shows the current profiles of SRAM and Flash FPGAs.

Configuration Cell

SRAM FPGAs use a six-transistor configuration cell. The SRAM configuration cell, shown in Figure 2, has a substantial leakage current. This leakage current multiplied by millions of configuration cells on the device results in high static power consumption.

Push-Pull Cell

Microchip's Flash FPGAs use a push-pull cell, shown in Figure 3, containing an N-channel and a P-channel non-volatile device. The N-channel and P-channel devices are stacked in series with one in the ON state and one in the OFF state to control the switch transistor, which is used to configure the logic elements and make routing connections.  The P-channel and N-channel devices have a charged storage layer. During programming, electrons are injected into the charged storage layer of one of the devices to turn the switch transistor ON or OFF. The charge remains trapped after programming, making the configuration cell non-volatile.

Figure 4 shows the OFF state where the N-channel device is on and the switch transistor is off.

Figure 5 shows the ON state where the P-channel device is on, the N-channel device is off, and the switch transistor is on.

Switch Leakage Path

The switch leakage path, seen in Figure 6, is the leakage across the switch when it is in the OFF state. The switch device has been optimized to provide much lower leakage than a standard transistor.

Stack Leakage Paths

For stack leakage paths like the one in Figure 7, one of the two non-volatile elements is always programmed into a very deep OFF state. The leakage of the stack is extremely low. It is much lower than the leakage of a standard Complementary Metal-Oxide-Semiconductor (CMOS) transistor stack. In addition, there are fewer transistors in the Flash configuration memory cell than are in an SRAM memory cell.

Result

The result is significantly lower leakage per cell and ultra-low static current. Microchip's low-power Flash FPGAs provide longer battery life in numerous applications such as the drone pictured in Figure 8. Lower power consumption can mean the elimination of heat sinks and cooling fans, like the one shown in Figure 9. This results in higher system reliability and lower total system costs.

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Radiation Effects

Radiation causes failures in ground and air systems. The two main causes of radiation failures in electronic systems are:

• Neutrons generated in the Earth's atmosphere by radiation from space
• Alpha particles generated by radioactive isotopes and packaged materials

SRAM FPGA

The radiation effect on the device functionality varies depending on where the particle impacts the device. In an SRAM FPGA, a particle striking the configuration cell in the logic module can change the function of the logic. A particle striking the configuration cell in the routing matrix can cause a change in the routing, leading to a misrouted or missing signal. These effects are difficult to mitigate and might require rebooting the device to clear the problem. Refer to Figure 11 for the locations of the logic modules vs the routing matrices.

Flash FPGA

The Flash configuration switch, shown in Figure 12, is immune to configuration errors. A particle striking the charged storage layer of an unprogrammed device doesn't add enough energy to turn it on. A neutron or alpha particle striking a program charge storage layer does not change its state.

The result is no changes to the logic functionality when the neutron or alpha particle strikes the Flash FPGA configuration cells in the logic module and no change in the routing if a particle strikes a configuration cell in the routing matrix. No mitigation is needed. Flash FPGA configuration cells are immune to radiation effects even in space.

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FPGA Security

Cybersecurity is the number one concern for connected devices on the network edge. Inexpensive hacking equipment can lead to millions of dollars of IP theft. Refer to Figure 13 for a layered security diagram. To protect your information, you need secure hardware, design, and data.

Hardware

First, you need trusted hardware. If you can't trust the hardware, you can't trust anything. All of Microchip's low and mid-range density FPGAs contain a certificate injected at manufacturing time. This certificate includes critical information about the device such as speed, grade, and temperature grade. This ensures that each FPGA is authenticated and verified for its specified performance and operational parameters, providing an additional layer of security and reliability.

Design

Design security means protecting the design programmed into the device to prevent copying, cloning, and reverse engineering.

Design security depends on trusted hardware. Microchip's FPGAs have numerous design security features such as a secure bit stream resistant to Differential Power Analysis (DPA). DPA is the technique to extract secret keys from an FPGA by measuring the power supply while the device is performing a cryptographic algorithm. SmartFusion^® 2, IGLOO^® 2, and PolarFire^® FPGAs use DPA countermeasure techniques licensed from Cryptography Research^®,  a division of Rambus^®. The DPA logo means the SmartFusion 2, IGLOO 2, and PolarFire devices have been externally assessed for DPA resistance in our key verification protocol and our bitstream programming by an external third-party laboratory. In addition, each Microchip low and mid-range density FPGA has an active mesh around critical circuitry to detect probing and tamper detection circuitry.

Data

Data security protects the data processed by the end application. Microchip's FPGAs include cryptographic accelerators to secure the data going through the device.

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Microchip vs Competition

The chart shown in Figure 14 compares the security advantage of low-density FPGAs vs mid-range FPGAs. Microchip Flash FPGAs are the most secure FPGAs available. All low-density and mid-range density devices have built-in design protection against cloning, overbuilding, reverse engineering, and counterfeiting. The design protection also includes anti-tamper detection circuitry with active zeroization allowing the device to be erased if tampering is detected. These design security features provide complete IP protection. Devices are available with hardware cryptographic accelerators for secured data communications. These accelerators, which are available for users, include:

• An AES-256 accelerator
• An SHA-256 accelerator
• An elliptical curve
• A cryptography hardware accelerator for public-private key encryption
• A random number generator

All of these features allow you to implement root-of-trust applications with Microchip FPGAs. Microchip's FPGAs offer superior security features when compared to the competitors. Other FPGAs either lack the security features present in Microchip's devices or are not as strong in terms of cryptographic security. Specifically, the SmartFusion 2 and IGLOO 2 low-density Flash FPGAs offer the best security among low-density devices. Furthermore, the PolarFire FPGAs and PolarFire SoC mid-range density FPGAs enhance the security features found in SmartFusion 2 and IGLOO 2, making them the most secure in the industry.

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Live at Power Up Application

Some electronic systems require special power sequencing for the different power supplies on the board. Microchips Flash FPGAs are ideally suited to implement these types of applications because they don't require configuration at power up. In the application shown in Figure 15, the FPGA configures digital points of load and handles the required power-up and power-down sequencing. After initialization, the FPGA can monitor the power supply signals and perform other required system functions. Microchip's FPGAs' low power, reliability, security, and live-at-power-up attributes make them an excellent choice for your next design project.

You can also find this course in video format from Microchip University as "Hello FPGA".

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